320 Pages 191 B/W Illustrations
    by CRC Press

    320 Pages 191 B/W Illustrations
    by CRC Press

    Currently strain engineering is the main technique used to enhance the performance of advanced silicon-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Written from an engineering application standpoint, Strain-Engineered MOSFETs introduces promising strain techniques to fabricate strain-engineered MOSFETs and to methods to assess the applications of these techniques. The book provides the background and physical insight needed to understand new and future developments in the modeling and design of n- and p-MOSFETs at nanoscale.

    This book focuses on recent developments in strain-engineered MOSFETS implemented in high-mobility substrates such as, Ge, SiGe, strained-Si, ultrathin germanium-on-insulator platforms, combined with high-k insulators and metal-gate. It covers the materials aspects, principles, and design of advanced devices, fabrication, and applications. It also presents a full technology computer aided design (TCAD) methodology for strain-engineering in Si-CMOS technology involving data flow from process simulation to process variability simulation via device simulation and generation of SPICE process compact models for manufacturing for yield optimization.

    Microelectronics fabrication is facing serious challenges due to the introduction of new materials in manufacturing and fundamental limitations of nanoscale devices that result in increasing unpredictability in the characteristics of the devices. The down scaling of CMOS technologies has brought about the increased variability of key parameters affecting the performance of integrated circuits. This book provides a single text that combines coverage of the strain-engineered MOSFETS and their modeling using TCAD, making it a tool for process technology development and the design of strain-engineered MOSFETs.

    Introduction
    Technology Scaling
    Substrate-Induced Strain Engineering
    Process-Induced Stress Engineering
    Electronic Properties of Strained Semiconductors
    Strain-Engineered MOSFETs
    Noise in Strain-Engineered Devices
    Technology CAD of Strain-Engineered MOSFETs
    Reliability of Strain-Engineered MOSFETs
    Process Compact Modelling
    Process-Aware Design
    Summary
    Additional Reading

    Substrate-Induced Strain Engineering in CMOS Technology

    Substrate Engineering
    Strained SiGe Film Growth
    Strained SiGe:C Film Growth
    Strained Si Films on Relaxed Si1–xGex
    Strained Si on SOI
    Strained Ge Film Growth
    Strained Ge MOSFETs
    Heterostructure SiGe/SiGe:C Channel MOSFETs
    Strained Si MOSFETs
    Hybrid Orientation Technology
    Summary
    Review Questions
    References

    Process-Induced Stress Engineering in CMOS Technology
    Stress Engineering
    Si1–xGex in Source/Drain
    Si1–yCy in Source/Drain
    Shallow Trench Isolation (STI)
    Contact Etch Stop Layer (CESL)
    Silicidation
    Stress Memorisation Technique (SMT)
    Global vs. Local Strain
    BEOL Stress: Through-Silicon Via
    TSV Modelling
    Summary
    Review Questions
    References

    Electronic Properties of Strain-Engineered Semiconductors

    Basics of Stress Engineering
    Stress–Strain Relationships
    Strain-Engineered MOSFETs: Current
    Energy Gap and Band Structure
    Silicon Conduction Band
    Silicon Valence Band
    Band Structure under Stress
    Piezoresistive Mobility Model
    Strain-Induced Mobility Model
    Implementation of Mobility Model
    Summary
    Review Questions
    References

    Strain-Engineered MOSFETs

    Process Integration
    Multigate Transistors
    Double-Gate MOSFET
    Ω-FinFET
    Tri-Gate FinFET
    FinFETs Using Gate-Induced Stress
    Stress-Engineered FinFETs
    Layout Dependence
    Summary
    Review Questions
    References

    Noise in Strain-Engineered Devices,
    C. Mukherjee
    Noise Mechanisms
    Fundamental Noise Sources
    1/f Noise in MOSFETs
    Noise Characterisation in MOSFETs
    Strain Effects on Noise in MOSFETs
    Noise in Strain-Engineered MOSFETs
    Noise in Multigate FETs
    Noise in Silicon Nanowire Transistors (SNWTs)
    Noise in Heterojunction Bipolar Transistors
    Summary
    Review Questions
    References

    Technology CAD of Strain-Engineered MOSFETs
    TCAD Calibration
    Simulation of Strain-Engineered MOSFETs
    DC Performance
    AC Performance
    Hybrid Orientation Technology for Strain-Engineered MOSFETs
    Simulation of Embedded SiGe MOSFETs
    Summary
    Review Questions
    References

    Reliability and Degradation of Strain-Engineered MOSFETs

    NBTI in Strain-Engineered p-MOSFETs
    Simulation of NBTI in p-MOSFETs
    HCI in Strain-Engineered n-MOSFETs
    Simulation of HCI in n-MOSFETs
    Reliability Issues in FinFETs
    Summary
    Review Questions
    References

    Process Compact Modelling of Strain-Engineered MOSFETs

    Process Variation
    Predictive Technology Modelling
    Process-Aware Design for Manufacturing
    Process Compact Model
    Process-Aware SPICE Parameter Extraction
    Summary
    Review Questions
    References

    Process-Aware Design of Strain-Engineered MOSFETs

    Process Design Co-Optimisation
    Classifications of Variation
    Designs for Manufacturing and Yield Optimisation
    Performance Optimisation
    Manufacturability Optimisation
    Summary
    Review Questions
    References

    Conclusions

    Index

    Biography

    C K Maiti (Author) ,  T K Maiti (Indian Institute of Technology, Kharagpur, India Indian Institute of Technology, Kharagpur Indian Institute of Technology, Kharagpur Indian Institute of Technology, Kharagpur Indian Institute of Technology, Kharagpur) (Author)

    "… an immensely useful book for the researcher in this field and even for some like me who do not work exactly in this area. Any scientist interested in strain modulation of device properties will value this book."
    —Supriyo Bandyopadhyay, Virginia Commonwealth University

    "… a timely bridge from the conventional MOSFETs to advanced strain-engineered MOSFETs to non-classical multiple gate devices to FinFETs. … I strongly recommend this book."
    —Dr. Enrique MIRANDA, Universitat Autònoma de Barcelona