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System-on-Chip Design and Technologies


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Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC

Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC

Marcello Coppola, Miltos D. Grammatikakis, Riccardo Locatelli, Giuseppe Maruccia, Lorenzo Pieralisi
September 17, 2008

Streamlined Design Solutions Specifically for NoCTo solve critical network-on-chip (NoC) architecture and design problems related to structure, performance and modularity, engineers generally rely on guidance from the abundance of literature about better-understood system-level interconnection...

Low-Power NoC for High-Performance SoC Design

Low-Power NoC for High-Performance SoC Design

Hoi-Jun Yoo, Kangmin Lee, Jun Kyong Kim
March 31, 2008

Chip Design and Implementation from a Practical Viewpoint Focusing on chip implementation, Low-Power NoC for High-Performance SoC Design provides practical knowledge and real examples of how to use network on chip (NoC) in the design of system on chip (SoC). It discusses many architectural and...

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