Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal
June 8, 2017
by CRC Press
Reference - 138 Pages - 39 Color & 49 B/W Illustrations
ISBN 9781498783590 - CAT# K30098
This book focuses towards the spacer engineering aspects of novel MOS-based device-circuit co-design in sub-20nm technology node, its process complexity, variability and reliabilities issues. This book comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations. This book concentrates on last ten years of cutting-edge research on high-permittivity materials and its usage in FinFETs either as gate-dielectric or spacer engineering. It specifically targets spacer engineering, discussing its pros and cons with FinFETs covers complete device to circuit perspective while exploring its variability aspects also.
Introduction to Nanoelectronics. Tri-gate FinFET Technology and Its Advancement. Dual-k Spacer Device Architecture and Its Electrostatics. Capacitive Analysis and Dual-k based Digital Circuit Design. Design Metric Improvement of Dual-k based SRAM Cell. Statistical Variability and Sensitivity Analysis.