1st Edition
Crystal Growth and Evaluation of Silicon for VLSI and ULSI
Silicon, as a single-crystal semiconductor, has sparked a revolution in the field of electronics and touched nearly every field of science and technology. Though available abundantly as silica and in various other forms in nature, silicon is difficult to separate from its chemical compounds because of its reactivity. As a solid, silicon is chemically inert and stable, but growing it as a single crystal creates many technological challenges.
Crystal Growth and Evaluation of Silicon for VLSI and ULSI is one of the first books to cover the systematic growth of silicon single crystals and the complete evaluation of silicon, from sand to useful wafers for device fabrication. Written for engineers and researchers working in semiconductor fabrication industries, this practical text:
- Describes different techniques used to grow silicon single crystals
- Explains how grown single-crystal ingots become a complete silicon wafer for integrated-circuit fabrication
- Reviews different methods to evaluate silicon wafers to determine suitability for device applications
- Analyzes silicon wafers in terms of resistivity and impurity concentration mapping
- Examines the effect of intentional and unintentional impurities
- Explores the defects found in regular silicon-crystal lattice
- Discusses silicon wafer preparation for VLSI and ULSI processing
Crystal Growth and Evaluation of Silicon for VLSI and ULSI is an essential reference for different approaches to the selection of the basic silicon-containing compound, separation of silicon as metallurgical-grade pure silicon, subsequent purification, single-crystal growth, and defects and evaluation of the deviations within the grown crystals.
Preface
About the Author
Introduction
Silicon: The Semiconductor
Why Single Crystals
Revolution in Integrated Circuit Fabrication Technology and the Art of Device Miniaturization
Use of Silicon as a Semiconductor
Silicon Devices for Boolean Applications
Integration of Silicon Devices and the Art of Circuit Miniaturization
MOS and CMOS Devices for Digital Applications
LSI, VLSI, and ULSI Circuits and Applications
Silicon for MEMS Applications
Summary
References
Silicon: The Key Material for Integrated Circuit Fabrication Technology
Introduction
Preparation of Raw Silicon Material
Metallurgical-Grade Silicon
Purification of Metallurgical-Grade Silicon
Ultra-High Pure Silicon for Electronics Application
Polycrystalline Silicon Feed for Crystal Growth
Summary
References
Importance of Single Crystals for Integrated Circuit Fabrication
Introduction
Crystal Structures
Different Crystal Structures in Nature
Cubic Structures
Diamond Crystal Structure
Silicon Crystal Structure
Silicon Crystals and Atomic Packing Factors
Crystal Order and Perfection
Crystal Orientations and Planes
Influence of Dopants and Impurities in Silicon Crystals
Summary
References
Different Techniques for Growing Single-Crystal Silicon
Introduction
Bridgman Crystal Growth Technique
Czochralski Crystal Growth/Pulling Technique
Crucible Choice for Molten Silicon
Chamber Temperature Profile
Seed Selection for Crystal Pulling
Environmental and Ambient Control in the Crystal Chamber
Crystal Pull Rate and Seed/Crucible Rotation
Dopant Addition for Growing Doped Crystals
Methods for Continuous Czochralski Crystal Growth
Impurity Segregation between Liquid and Grown Silicon Crystals
Crystal Growth Striations
Use of a Magnetic Field in the Czochralski Growth Technique
Large-Area Silicon Crystals for VLSI and ULSI Applications
Post-Growth Thermal Gradient and Crystal Cooling after Pull-Out
Float-Zone Crystal Growth Technique
Seed Selection
Environment and Chamber Ambient Control
Heating Mechanisms and RF Coil Shape
Crystal Growth Rate and Seed Rotation
Dopant Distribution in Growing Crystals
Impurity Segregation between Liquid and Grown Silicon Crystals
Use of Magnetic Field for Float-Zone Growth
Large Area Silicon Crystals and Limitations of Shape and Size
Thermal Gradient and Post-Growth Crystal Cooling
Zone Refining of Single-Crystal Silicon
Other Silicon Crystalline Structures and Growth Techniques
Silicon Ribbons
Silicon Sheets
Silicon Whiskers and Fibers
Silicon in Circular and Spherical Shapes
Silicon Hollow Tubes
Casting of Polycrystalline Silicon for Photovoltaic Applications
Summary
References
From Silicon Ingots to Silicon Wafers
Introduction
Radial Resistivity Measurements
Boule Formation, Identification of Crystal Orientation, and Flats
Ingot Slicing
Mechanical Lapping of Wafer Slices
Edge Profiling of Slices
Chemical Etching and Mechanical Damage Removal
Chemimechanical Polishing for Planar Wafers
Surface Roughness and Overall Wafer Topography
Megasonic Cleaning
Final Cleaning and Inspection
Summary
References
Evaluation of Silicon Wafers
Introduction
Acoustic Laser Probing Technique
Atomic-Force Microscope Studies on Surfaces
Auger Electron Spectroscopic Studies
Chemical Staining and Etching Techniques
Contactless Characterization
Deep-Level Transient Spectroscopy
Defect Decoration by Metals
Electron Beam and High-Energy Electron Diffraction Studies
Flame Emission Spectrometry
Four-Point Probe Technique for Resistivity Measurement and Mapping
Fourier Transform Infrared Spectroscopy Measurements for Impurity Identification
Gas Fusion Analysis
Hall Mobility
Mass Spectra Analysis
Minority Carrier Diffusion Length/Lifetime/Surface Photovoltage
Optical Methods for Impurity Evaluation
Photoluminescence Method for Determining Impurity Concentrations
Gamma-Ray Diffractometry
Scanning Electron Microscopy for Defect Analysis
Scanning Optical Microscope
Secondary Ion Mass Spectrometer for Impurity Distribution
Spreading Resistance and Two-Point Probe Measurement Technique
Stress Measurements
Transmission Electron Microscopy
van der Pauw Resistivity Measurement Technique for Irregular-Shaped Wafers
X-Ray Technique for Crystal Perfection and Dislocation Density
Summary
References
Resistivity and Impurity Concentration Mapping of Silicon Wafers
Introduction
Electrically Active and Inactive Impurities
Surface Mapping and Concentration Contours
Surface Roughness Mapping on a Complete Wafer
Summary
References
Impurities in Silicon Wafers
Effect of Intentional and Unintentional Impurities and Their Influence on Silicon Devices
Intentional Dopant Impurities in Silicon Wafers
Aluminum
Antimony
Arsenic
Boron
Gallium
Phosphorus
Unintentional Dopant Impurities in Silicon Wafers
Carbon
Chromium
Copper
Germanium
Gold
Helium
Hydrogen
Iron
Nickel
Nitrogen
Oxygen
Tin
Other Metallic Impurities
Summary
References
Defects in Silicon Wafers
Introduction
Impact of Defects in Silicon Devices and Structures
Point Defects and Vacancies
Line Defects
Bulk Defects and Voids
Dislocations and Screw Dislocations
Swirl Defects
Stacking Faults
Precipitations
Surface Pits/Crystal-Originated Particles
Grown Vacancies and Defects
Thermal Donors
Slips, Cracks, and Shape Irregularities
Stress, Bowing, and Warpage
Summary
References
Silicon Wafer Preparation for VLSI and ULSI Processing
Introduction
Purity of Chemicals Used for Silicon Processing
Degreasing of Silicon Wafers
Removal of Metallic and Other Impurities
Gettering of Metallic Impurities
Denuding of Silicon Wafers
Neutron Irradiation
Argon Annealing of Wafers
Hydrogen Annealing of Wafers
Final Cleaning, Rinsing, and Wafer Drying
Summary
References
Packing of Silicon Wafers
Packing of Fully Processed Blank Silicon Wafers
Storage of Wafers and Control of Particulate Contamination
Storage of Wafers and Control of Particulate Contamination with Process-Bound Wafers
Summary
References
Index
Biography
Golla Eranna obtained his master’s degree from Sri Venkateswara University, Tirupati, India, with a top rank in the field of semiconductor physics. After that, he joined and received his Ph.D from the Indian Institute of Technology (IIT) Madras. Later, he moved to the IIT Kharagpur Microelectronics Centre. Dr. Eranna joined CEERI, Pilani, India, as a scientist and is currently a senior principal scientist. He became a professor under the Academy of Scientific and Innovative Research (CSIR, New Delhi), and regularly lectures on VLSI processing technology. He also maintains a full-fledged semiconductor device fabrication laboratory.
