Designing Network On-Chip Architectures in the Nanoscale Era

Jose Flich, Davide Bertozzi

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December 18, 2010 by Chapman and Hall/CRC
Reference - 528 Pages - 275 B/W Illustrations
ISBN 9781439837108 - CAT# K11679
Series: Chapman & Hall/CRC Computational Science

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Features

  • Presents the foundations of NoC technology, emphasizing industrial applicability
  • Covers established and alternative design principles and guidelines
  • Explores design techniques that meet the requirements of emerging research and development, such as vertical integration and variation-tolerant design
  • Illustrates the techniques through real design examples, including those from the semiconductor industry in the CMP and MPSoC domains

Summary

Going beyond isolated research ideas and design experiences, Designing Network On-Chip Architectures in the Nanoscale Era covers the foundations and design methods of network on-chip (NoC) technology. The contributors draw on their own lessons learned to provide strong practical guidance on various design issues.

Exploring the design process of the network, the first part of the book focuses on basic aspects of switch architecture and design, topology selection, and routing implementation. In the second part, contributors discuss their experiences in the industry, offering a roadmap to recent products. They describe Tilera’s TILE family of multicore processors, novel Intel products and research prototypes, and the TRIPS operand network (OPN). The last part reveals state-of-the-art solutions to hardware-related issues and explains how to efficiently implement the programming model at the network interface. In the appendix, the microarchitectural details of two switch architectures targeting multiprocessor system-on-chips (MPSoCs) and chip multiprocessors (CMPs) can be used as an experimental platform for running tests.

A stepping stone to the evolution of future chip architectures, this volume provides a how-to guide for designers of current NoCs as well as designers involved with 2015 computing platforms. It cohesively brings together fundamental design issues, alternative design paradigms and techniques, and the main design tradeoffs—consistently focusing on topics most pertinent to real-world NoC designers.