Table of Contents

SECTION 1: FABRICATION & TECHNOLOGY
Trends and Projections for the Future of Scaling and Future
Integration Trends, Hiroshi Iwai and Shun-ichiro Ohmi, Tokyo Institute. of Technology,
CMOS
VLSI Circuits, Eugene John,University of Texas Pan American Pass-Transistor
CMOS Circuits, Shunzo Yamashita , Hitachi
Synthesis of CMOS Pass-Transistor Logic, Dejan Markovic, University of California at Berkeley
Silicon on Insulator (SOI), Yuichi Kado, NEC
High-Speed Low-Power Emitter Coupled Logic Circuits, Tadhiro Kuroda, NEC
Price Performance of Computer Technology, John McCallum, National University of Singapore
SECTION 2: COMPUTER SYSTEMS AND ARCHITECTURE
Computer Architecture Introduction, Jean-Luc Gaudiot, University of Southern California
Computer Server Architecture Siamack Haghighi,Intel
VLIW Processors, Binu Mathew, University of Utah
Vector Processors, Krste Asanovic, MIT
Multi-Threading and Multi-Processing, Manoj Franklin, University of Maryland
Survey of Parallel Systems, Donna Quammen, George Mason University
Virtual Memory Systems, Bruce Jacob, University of Maryland
System Design
Superscalar Processors, Mark Smotherman, Clemson University
Register Renaming Techniques, Dezso Sima, Budapest Polytechnic
Predicting Branches in Computer Programs, Kevin Skadron, University of Virginia
Network Processor Architecture, Tzi-cker Chiueh, State University of New York at Stony Brook
Architectures for Low Power, Pradip Bose, IBM T.J. Watson Research Center
Performance Evaluation
Measurement and Modeling of Disk Subsystem Performance, Jozo Dujmovic, San Francisco State University
Performance Evaluations: Techniques, Tools, and Benchmarks Lizy Kurian John, University of Texas at Austin
Trace Caching and Trace Processors, Eric Rotenberg,North Carolina State University
Computer Arithmetic, Earl Swartzlander, University of Texas at Austin
Fast Adders and Multipliers, Gensuke Goto, Fujitsu
SECTION 3: DESIGN TECHNIQUES
Timing and Clocking
Design of High Speed CMOS PLLs and DLLs, John Maneatis, True Circuits
Latches and Flip-Flops, Fabian Klass, Sun Microsystems
High-Performance Embedded SRAM, Cyrus Afghahi, Broadcom Corporation
Multiple-Valued Logic Circuits, Wayne Current, University of California at Davis
PGAs for Rapid Prototyping, James Hamblen, Georgia Institute of Technology
Issues in High-Frequency Processor Design, Kevin Nowka, IBM
SECTION 4: DESIGN FOR LOW-POWER
Introduction, Vivek De, Intel
Low-Power Design Issues, Hemmige Varadarajan, Vivek Tiwari, Rakesh Patel, Hema Ramamurthy, Shahram Jamshidi, Snehal Jariwala, and Wenjie Jiang, Intel
Low-Power Circuit Technologies, Masa Miyazaki, Hitachi Ltd.
Techniques for Leakage Power Reduction, Vivek De, Intel, et al.
Dynamic Voltage Scaling, Tom Burd, University of California at Berkeley
Low-Power Design of Systems on Chip, Christian Piguet, CSEM
Implementation-Level Impact on Low Power Design,Katsunori Seno, SONY
Low Power VLSI, Hendrawan Soeleman, Sun Microsystems, Kaushik Roy, Purdue Univeristy
Clock Powered CMOS, Nestoras Tzartzanis, ISI
SECTION 5: EMBEDDED APPLICATIONS
Embedded Systems-on-Chips, Wayne Wolfe, Princeton University
Embedded Processor Applications, Jonathan W. Valvano, University of Texas at Austin
SECTION 6: SIGNAL PROCESSING
DSP Introduction, Fred Taylor, University of Florida
DSP Applications, Daniel Martin, Infineon
Digital Filter Design, James McClellan and Worayot Lerthiphonphun, Georgia Institute of Technology
Audio Signal Processing, AdamDabrowski andTomaszMarciniak, Poznan University of Technology
Digital Video Processing, Todd R. Reed, University of California, Davis
Low Power Digital Signal Processing,Thucydides Xanthopoulos, Caveo Networks
SECTION 7: COMMUNICATIONS AND NETWORKS
Communications and Computer Networks, Anna Hac, University of Hawaii
SECTION 8: INPUT/OUTPUT
Circuits for High-Performance Interconnections, Ken Yang, University of California at Los Angeles
Algorithms and Data Structures in External Memory, Jeff Vitter, Duke University
Parallel I/O Systems, Peter Varman, Rice University
Read Channel for Magnetics, Bane Vasic, University of Arizona
Recording Physic and Organization of Data on Disk, Bane Vasic, University of Arizona
Read Channel Architecture, Bane Vasic, University of Arizona, Pervez Aziz, Agere Systems, Necip Sayiner, Lucent Technologies
Adaptive Equalization and Timing Recovery, Pervez Aziz, Agere Systems
Head Position Sensing in Disk Drives, Ara Patapoutian, Quantum Corporation
Modulation Codes for Data Storage, Emina Soljanin, Lucent Technologies, Brian Marcus, IBM Almaden Research Center
Data Detection, Vojin Senk and Miroslav Despotovic, University of Novi Sad
Introduction to Error-Correcting Codes, Mario Blaum, IBM Research Division
SECTION 9: Distributed Operating Systems, Peter Reiher, University of California at Los Angeles
SECTION 10: NEW DIRECTIONS IN COMPUTING
Reconfigurable Processors, Majid Sarrafzadeh, University of California at Los Angeles
Reconfigurable Computing, John Morris, University of Western Australia
Using Configurable Computing Systems, Don Bouldin and Danny Newport, University of Tennessee
Xtensa: A Configurable and Extensible Processor, Ricardo Gonzalez, Tensilica
Role of Software Technology in Intelligent Transportation Systems, Shoichi Washino, Mitsubishi
Media Signal Processing
Media Signal Processor Architectures, Ruby Lee, Princeton University
DSP Platform Architecture for SOC Products, Jerry Pechanek, BOPS
Digital Audio Processors for Personal Computer Systems, Tom Savell , E-Mu
Modern Approximation Interactive Algorithms and Their Applications in Computer Engineering, Sadiq M. Sait and Habib Youssef, King Fahd University of Petroleum and Minerals
Internet Architectures, Borko Furht, Florida Atlantic University
Microelectronics for Home Entertainment, Yoshiaki Hagiwaram, SONY
Mobile and Wireless Computing,
Wireless Computer Networks: Bluetooth, John F. Alexander, University of Northern Florida
Signal Processing ASIC Requirements for High-Speed Wireless Data Communications, Babak Daneshrad, University of California at Los Angeles
Communication Systems on a Chip, Samiha Mourad, Santa Clara University
Communication and Computer Networks, Mohammad Ilyas, Florida Atlantic University
Video in Mobil Networks, Abdul Sadka, Multimedia Communications Research Group
Pen-Based User Interfaces: An Applications Overview, Giovanni Seni, Motorola Research
What Makes a Programmable DSP Processor Special? Ingrid Verbauwhede, University of California at Los Angeles
Data Security, Matt Franklin, University of California at Davis
SECTION 11: TESTING AND DESIGN FOR TESTABILITY
Testing and Design for Testability, R. Chandramouli, Synopsys
Testing of Synchronous Sequential Digital Circuits, Zoran Stamenkovic, IHP-Microelectronics, H.T. Vierhaus, Brandenburg Universiy of Technology, Uwe Glaeser, Heinz Nixdorf Insitute
Scan Testing, Chouki Aktouf, IUT Valence
Computer-Aided Analysis and Forecast of Integrated Circuit Yield, Ninoslav Stojadinovic, University of Nis, Zoran Stamenkovic, IHP-Microelectronics